MOTOROLASEMICONDUCTOR TECHNICAL DATAQuad 2-Input ExclusiveOR GateMC54/74HC86AJ SUFFIXCERAMIC PACKAGECASE 632–081High–Performance Silicon–Gate CMOSThe MC54/74HC86A is identical in pinout to the LS86; this device issimilar in function to the MM74C86 and L86, but has a different pinout. Thedevice inputs are compatible with standard CMOS outputs; with pullupresistors, they are compatible with LSTTL outputs.••••••Output Drive Capability: 10 LSTTL LoadsOutputs Directly Interface to CMOS, NMOS, and TTLOperating Voltage Range: 2 to 6 VLow Input Current: 1 µAHigh Noise Immunity Characteristic of CMOS DevicesIn Compliance with the Requirements Defined by JEDEC StandardNo. 7A•Chip Complexity: 56 FETs or 14 Equivalent Gates14141N SUFFIXPLASTIC PACKAGECASE 646–06141D SUFFIXSOIC PACKAGECASE 751A–03141DT SUFFIXTSSOP PACKAGECASE 948G–01LOGIC DIAGRAMORDERING INFORMATIONA1B1A2B2A3B3A4B4124591012133Y1MC54HCXXAJMC74HCXXANMC74HCXXADMC74HCXXADTCeramicPlasticSOICTSSOP6Y2Y = A ⊕ B= AB + ABPIN ASSIGNMENTA1B11234567141312111098VCCB4A4Y4B3A3Y38Y311Y1Y4A2B2Y2GNDPIN 14 = VCCPIN 7 = GNDFUNCTION TABLEInputsALLHHBLHLHOutputYLHHL3/97© Motorola, Inc. 19971REV 1MC54/74HC86AMAXIMUM RATINGS*SymbolVCCVinParameterValueUnitVVVDC Supply Voltage (Referenced to GND)DC Input Voltage (Referenced to GND)– 0.5 to + 7.0– 0.5 to VCC + 0.5– 0.5 to VCC + 0.5±20±25±50750500450VoutIinDC Output Voltage (Referenced to GND)DC Input Current, per PinmAmAmAIoutDC Output Current, per PinICCPDDC Supply Current, VCC and GND PinsPower Dissipation in Still Air,Plastic or Ceramic DIP†SOIC Package†TSSOP Package†Storage TemperaturemWThis device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this high–impedance cir-cuit. For proper operation, Vin andVout should be constrained to therange GND v (Vin or Vout) v VCC.Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or VCC).Unused outputs must be left open.TstgTL– 65 to + 150260300_C_CLead Temperature, 1 mm from Case for 10 Seconds(Plastic DIP, SOIC or TSSOP Package)(Ceramic DIP)*Maximum Ratings are those values beyond which damage to the device may occur.Functional operation should be restricted to the Recommended Operating Conditions.†Derating—Plastic DIP: – 10 mW/_C from 65_ to 125_CCeramic DIP: – 10 mW/_C from 100_ to 125_CSOIC Package: – 7 mW/_C from 65_ to 125_CTSSOP Package: – 6.1 mW/_C from 65_ to 125_CFor high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).RECOMMENDED OPERATING CONDITIONSSymbolVCCParameterMin2.00Max6.0UnitVVDC Supply Voltage (Referenced to GND)Vin, VoutTADC Input Voltage, Output Voltage (Referenced to GND)Operating Temperature, All Package TypesInput Rise and Fall Time(Figure 1)VCC– 55000+ 1251000500400_Cnstr, tfVCC = 2.0 VVCC = 4.5 VVCC = 6.0 VDC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed Limitv 85_C1.52.13.154.20.50.91.351.81.94.45.9SblSymbolVIHPParameterTTest ConditionsCdiiVCCV2.03.04.56.02.03.04.56.02.04.56.03.04.56.0– 55 to25_C1.52.13.154.20.50.91.351.81.94.45.9v 125_C1.52.13.154.20.50.91.351.81.94.45.9UiUnitVMinimum High–Level InputVoltageVout = 0.1 V or VCC – 0.1 V|Iout| v 20 µAVILMaximum Low–Level InputVoltageVout = 0.1 V or VCC – 0.1 V|Iout| v 20 µAVVOHMinimum High–Level OutputVoltageVin = VIH or VIL|Iout| v 20 µAVVin = VIH or VIL|Iout| v 2.4 mA|Iout| v 4.0 mA|Iout| v 5.2 mA2.483.985.482.343.845.342.203.705.20MOTOROLA2High–Speed CMOS Logic DataDL129 — Rev 6MC54/74HC86ADC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed Limitv 85_C0.10.10.1SymbolVOLParameterTest ConditionsVCCV2.04.56.03.04.56.06.06.0– 55 to25_C0.10.10.1v 125_C0.10.10.1UnitVMaximum Low–Level OutputVoltageVin = VIH or VIL|Iout| v 20 µAVin = VIH or VIL|Iout| v 2.4 mA|Iout| v 4.0 mA|Iout| v 5.2 mAVin = VCC or GNDVin = VCC or GNDIout = 0 µA0.260.260.260.330.330.330.400.400.40IinICCMaximum Input Leakage CurrentMaximum Quiescent SupplyCurrent (per Package)±0.11.0±1.010±1.040µAµANOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input t, = tf = 6 ns)Guaranteed LimitSblSymboltPLH,tPHLPParameterVCCV2.03.04.56.02.03.04.56.0—– 55 to25_C1008020177530151310v 85_C1259025219540191610v 125_C150110312611055221910UiUnitnsMaximum Propagation Delay, Input A or B to Output Y(Figures 1 and 2)tTLH,tTHLMaximum Output Transition Time, Any Output(Figures 1 and 2)nsCinMaximum Input CapacitancepFNOTES:1.For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).2.Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).Typical @ 25°C, VCC = 5.0 VCPDPPower Dissipation Capacitance (Per Gate)*DiiiCi(PG)*33pFF*Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of theMotorola High–Speed CMOS Data Book (DL129/D).High–Speed CMOS Logic DataDL129 — Rev 63MOTOROLAMC54/74HC86AtrINPUTA OR BtPLH90%OUTPUT Y50%10%tTLHtTHL*Includes all probe and jig capacitance90%50%10%tPHLtfVCCTEST POINTGNDOUTPUTDEVICEUNDERTESTCL*Figure 1. Switching WaveformsFigure 2. Test CircuitEXPANDED LOGIC DIAGRAM(1/4 of Device)AYBMOTOROLA4High–Speed CMOS Logic DataDL129 — Rev 6MC54/74HC86AOUTLINE DIMENSIONSJ SUFFIXCERAMIC DIP PACKAGECASE 632–08ISSUE Y8-A-14-B-17CLNOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEAD WHENFORMED PARALLEL.4.DIMESNION F MAY NARROW TO 0.76 (0.030)WHERE THE LEAD ENTERS THE CERAMICBODY.INCHESMINMAX0.7500.7850.2450.2800.1550.2000.0150.0200.0550.0650.100 BSC0.0080.0150.1250.1700.300 BSC0° 15° 0.0200.040MILLIMETERSMINMAX19.0519.946.237.113.945.080.390.501.401.652.54 BSC0.210.383.184.317.62 BSC0° 15°0.511.01-T-SEATINGPLANEKFGD 14 PL0.25 (0.010)MNTASMJ 14 PL0.25 (0.010)MTBSDIMABCDFGJKLMN148N SUFFIXPLASTIC DIP PACKAGECASE 646–06ISSUE LB17NOTES:1.LEADS WITHIN 0.13 (0.005) RADIUS OF TRUEPOSITION AT SEATING PLANE AT MAXIMUMMATERIAL CONDITION.2.DIMENSION L TO CENTER OF LEADS WHENFORMED PARALLEL.3.DIMENSION B DOES NOT INCLUDE MOLDFLASH.4.ROUNDED CORNERS OPTIONAL.DIMABCDFGHJKLMNINCHESMILLIMETERSMINMAXMINMAX0.7150.77018.1619.560.2400.2606.106.600.1450.1853.694.690.0150.0210.380.530.0400.0701.021.780.100 BSC2.54 BSC0.0520.0951.322.410.0080.0150.200.380.1150.1352.923.430.300 BSC7.62 BSC0 10 0 10 ____0.0150.0390.391.01AFCNHGDSEATINGPLANELJKM–A–148D SUFFIXPLASTIC SOIC PACKAGECASE 751A–03ISSUE F–B–17P 7 PL0.25 (0.010)MBMNOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDEMOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.GCR X 45°FSEATINGPLANED 14 PL0.25 (0.010)KMMBSJTASDIMABCDFGJKMPRMILLIMETERSMINMAX8.758.554.003.801.751.350.490.351.250.401.27 BSC0.250.190.250.107°0° 5.806.200.250.50INCHESMINMAX0.3370.3440.1500.1570.0540.0680.0140.0190.0160.0490.050 BSC0.0080.0090.0040.0097° 0° 0.2280.2440.0100.019High–Speed CMOS Logic DataDL129 — Rev 65MOTOROLAMC54/74HC86AOUTLINE DIMENSIONSDT SUFFIXPLASTIC TSSOP PACKAGECASE 948G–01ISSUE O14X REFKNOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH,PROTRUSIONS OR GATE BURRS. MOLD FLASHOR GATE BURRS SHALL NOT EXCEED 0.15(0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEADFLASH OR PROTRUSION. INTERLEAD FLASH ORPROTRUSION SHALL NOT EXCEED0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL INEXCESS OF THE K DIMENSION AT MAXIMUMMATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.7.DIMENSION A AND B ARE TO BE DETERMINEDAT DATUM PLANE –W–.DIMABCDFGHJJ1KK1LMMILLIMETERSMINMAX4.905.104.304.50–––1.200.050.150.500.750.65 BSC0.500.600.090.200.090.160.190.300.190.256.40 BSC0 8 __INCHESMINMAX0.1930.2000.1690.177–––0.0470.0020.0060.0200.0300.026 BSC0.0200.0240.0040.0080.0040.0060.0070.0120.0070.0100.252 BSC0 8 __0.10 (0.004)0.15 (0.006)TUSMTUSVSN2XL/21480.25 (0.010)MLPIN 1IDENT.17B–U–NFDETAIL EKK10.15 (0.006)TUSA–V–JJ1SECTION N–N–W–C0.10 (0.004)–T–SEATINGPLANEDGHDETAIL EMotorola reserves the right to make changes without further notice to any products herein. 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Motorola, Inc. is an EqualOpportunity/Affirmative Action Employer.Mfax is a trademark of Motorola, Inc.How to reach us:USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315Mfax™: RMFAX0@email.sps.mot.com– TOUCHTONE 602–244–6609ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,– US & Canada ONLY 1–800–774–184851 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298INTERNET: http://www.mot.com/SPS/MOTOROLA◊6MC74HC86A/DHigh–Speed CMOS Logic DataDL129 — Rev 6