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EPM2210

来源:小奈知识网
Dedicated Pin Information for the MAX®II

EPM2210 / EPM2210G Devices

Version 1.2

Dedicated PinIO/GCLK0IO/GCLK1IO/GCLK2IO/GCLK3IO/DEV_OEIO/DEV_CLRnTDITMSTCKTDOGNDINTGNDIO

256-Pin FBGAH5J5J12H12M8M9L6N4P3M5

F7, G6, H7, H9, J8, J10, K11, L10

A1, A16, B2, B15, G7, G8, G9, G10, K7, K8, K9, K10, R2, R15, T1, T16

F10, G11, H8, H10, J7, J9, K6, L7C1, H6, J6, P1A3, A14, F8, F9C16, H11, J11, P16L8, L9, T3, T14-204

324-Pin FBGAJ6K6K13J13N9N10M7P5R4N6

G8, H7, J8, J10, K9, K11, L12, M11

A1, A18, B2, B17, H8, H9, H10, H11, L8, L9, L10, L11, U2, U17, V1, V18

G11, H12, J9, J11, K8, K10, L7, M8C1, J7, K7, T1A3, A16, G9, G10 C18, J12, K12, T18M9, M10, V3, V16-272

VCCINT (1)VCCIO1 (2)VCCIO2 (2)VCCIO3 (2) VCCIO4 (2) No Connect (N.C.)Total User I/O PinsNotes:

1. For EPM2210 devices, all VCCINT pins must be connected to either 3.3V or 2.5V (but not a combination of both). For EPM2210G devices, all VCCINT pins must be connected to 1.8V.

2. Each set of VCCIO pins (VCCIO1, VCCIO2, etc.) can be connected to 3.3V, 2.5V, 1.8V, or 1.5V.

I/O Pin Information for the MAX®II

EPM2210 / EPM2210G Devices

Version 1.2

Bank NumberB1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1

Pad Number Orientation0123456789101112131415161718192021222324252627282930313233343536373839404142434445

Pin/Pad FunctionVCCIO1GNDIOIOIOIO

VCCINTIOIOIOIOIOIOIOIOIO

VCCIO1GNDIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO

VCCIO1GNDIOIOIOIOIOIOIO

GNDINTIO

VCCINTIOIO

Optional Function(s)

256-Pin FBGA324-Pin FBGA

D3C2

C2C3D2D1D3E2D4E1E3F3E4F2

C3E3D2E4D1E5E2

F3E1F4F2F5F1F6G2G3G1

E5F1F4G3F5G2F6G1G4H3G5H2G6H1G7J3

G4H2G5H1H3J1

GCLK0GCLK1

H5J5H4

H4J2H5J1H6K1J6K6J4

B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B1B4B4B4B4B4B4B4464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596IOIOIOIOIO

VCCIO1GNDIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO

VCCIO1GNDIOIOIOIOIOIOIO

GNDINTIOIOTMSTDITCKTDOIOIO

VCCIO1GNDION.C. (1)VCCIO4GNDIOIO

VCCINTIOIOIOIO

J2J4K1

K2J5K3K5L1

J3K2K5L1K4

L2K3M1L5M2L4L3

K4L2L6L3L5M1L4M2M6M3M5N1M4N2N5N3

N1M4N2M3

N4P1P4P2P3R1R2R3P5M7R4N6T2T3

N3N4L6P3M5P2

U1

R1P4T2P5

V2R5U3P6

B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147IOIOIOIOIOIOIOIO

GNDIOVCCIO4IOIOIOIOIOIOIOIOIOIOIOIOIO

VCCIO4GNDIOIOIOIOIOIOIO

GNDINTIO

VCCINTIOIOIOIOIOIOIO

VCCIO4GNDIOIOIOIOIOIOIOIOIO

R3N5

T4R6U4T6V4N7T5P7

R4P6T4N6R5M6T5P7R6N7T6M7R7U5R7V5T7U6N8V6P8U7R8V7T8U8

P8T7N8R8N9T8T9R9P9T10M8M9M10R10

P9V8R9U9T9V9U10V10P10U11N9N10R10V11

DEV_OEDEV_CLRn

N10T11P10R11M11T12N11R12T10U12N11V12P11U13R11V13

B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B4B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198IOIOIOIO

VCCIO4GNDIOIOIOIOIOIOIOIOIOIOIOIOIO

GNDINTIOIO

VCCIO4GNDIOVCCIO3GNDIOIOIOIO

VCCINTIOIOIOIOIOIOIOIOIOIOIOIOIO

VCCIO3GNDIOIOIOIOIOIOIOIO

P11T13M12R13T11T14N12U14

N12R14P12T15

P12V14R12T15T12U15P13V15R13U16T13V17U18R14

R16P13

P14

T17R15T16R16P15R17P14R18N15P16N14P17N13P18M15N16

P15N13

N14M14N15M13N16

L14M15L13M16L12

M14N17M13N18M12M16L16

B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3B3199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249IOIOIOIOIOIOIO

VCCIO3GNDIOIOIOIOIOIOIO

VCCINTIO

GNDINTIOIOIOIOIOIO

GNDIOVCCIO3IOIOIOIOIOIOIOIOIOIOIOIO

GNDIOVCCIO3IOIOIOIOIOIOIOIOIOIOIO

L15L11L16K14K15K13K16M17L15M18L14L17L13L18

GCLK2GCLK3

K12J15J14J16J13J12H12H16H13H15H14G16G12

K16K17K15K18K14K13J13J18J14J17J15H18J16

G15G13F16G14F15F11E16F12E15F13D16F14H17H13G18H14G17H15G16H16F18G12F17G13

D15E12

D14

E13

C15

F16G14E18G15E17F13D18F14E16F15D17

B3B3B3B3B3B3B3B3B3B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2

250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300IOIO

GNDINTIOIOIOIO

N.C. (1)VCCIO3GNDIOVCCIO2GNDIOVCCINTIOIOIOIOIOIOIOIOIOIOIOIO

GNDIOVCCIO2IOIOIOIOIOIOIOIOIOIOIOIO

GNDIOVCCIO2IOIOIOIOIOIOIOIOIO

VCCINT

E14D16

C14E14D13

C16E15C17D15

B16C13A15C12

B18D14A17E13B16D13C15F12B15E12A15D12

B14D12B13C11A13D11B12E11A12C10B11D10C14C12B14F11A14E11C13D11B13C11A13F10

A11E10B10C9A10D9B9E9A9B12E10A12D10B11C10A11C9B10

B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2B2Notes:

301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341

1. No Connect

IO

GNDINTIOIOIOIOIOIO

GNDIOVCCIO2IOIOIOIOIOIOIOIOIOIOIOIOIOIO

GNDIOVCCIO2IOIOIOIOIOIOIOIOIO

GNDINTIOIOIO

VCCIO2GNDIO

A8B8E8A7D8B7C8

A10A9D9B9E9A8F9

A6E7B6D7A5C7B5E6A4D6B4C6C4C5B8C8A7D8B7E8A6F8B6C7A5D7B5E7

B3D5

A2B1D4

C5F7A4C6B4D6C4E6B3A2D5B1

Pin Description Information for the MAX® II and MAX® IIG Devices

Version 1.2

Pin Name

Pin Type

Pin Description

Supply and Reference pins

I/O supply voltage pins for banks 1 through 4 respectively. EPM2210 and EPM1270 use VCCIO[1..4] while EPM240 and EPM570 use VCCIO[1..2]. Each VCCIO bank supports a different voltage level with the VCCIO pins providing power for the input and output buffers within that particular I/O bank. Each VCCIO bank can be powered with either 3.3 V, 2.5 V, 1.8 V or 1.5 V. Ground pins for all the I/O banks.Voltage supply pins for the device.

Ground pins for the internal supply.

Programming and JTAG pins

Dual-purpose pin that can override all clears on all device registers. All registers are cleared when the pin is driven low and all registers behave as defined in the design when this pin is driven high. If not used for its dual-purpose function this pin is a regular I/O.

Dual-purpose pin that can override all tri-states on the device. All output pins are

tristated when the pin is driven low and all output pins behave as defined in the design when this pin is driven high. If not used for its dual-purpose function this pin is a regular I/O.

Dedicated JTAG input pin.Dedicated JTAG input pin.Dedicated JTAG input pin.Dedicated JTAG output pin.

Clock PinsDual-purpose clock pins that connect to the global clock network. If not used for its dual-purpose function this pin is a regular I/O.

VCCIO[1..4]GNDIOVCCINTGNDINT

PowerGroundPowerGround

DEV_CLRnI/O

DEV_OETCKTDITMSTDOI/OInputInputInputOutput

GCLK [0..3]I/O

Package Diagram and Bank Information for the MAX® II

EPM2210 / EPM2210G Devices

Version 1.2

Figure 1. MAX II EPM2210 / EPM2210G F256 Device Top View Package Diagram and Bank Information

Package Diagram and Bank Information for the MAX® II

EPM2210 / EPM2210G Devices

Version 1.2

Figure 2. MAX II EPM2210 / EPM2210G F324 Device Top View Package Diagram and Bank Information

Pin Information for the MAX® II EPM2210 and EPM2210G Devices

Revision History

Version 1.2

The table below shows the revision history

Date/Version

January 2005, v1.2July 2004, v1.1May 2004, v1.0

Changes Made

Added MAX IIG Device Naming to Titles, Notes, and Figures

Added Package Diagram and Bank Information Figures for Each PackageInitial Release

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