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SUBSTRATE AND MANUFACTURING METHOD OF THE SAME

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专利名称:SUBSTRATE AND MANUFACTURING

METHOD OF THE SAME

发明人:Yoshiaki Shimizu申请号:US12343740申请日:20081224

公开号:US20090179305A1公开日:20090716

专利附图:

摘要:According to the present invention, on a double-sided substrate a plurality ofthrough-holes connected to one wire for plating as well as wiring are collectively

arranged within a narrow range close to the connection portion. After a plating process, a

penetrating hole is formed and the connection potion is cut off. Thus, the wire for platingand the collectively arranged through-holes are made independent of one another sothat no electric conduction occurs among the wire for plating and the through-holes

申请人:Yoshiaki Shimizu

地址:Shiga JP

国籍:JP

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