专利名称:Method of salicide formation by siliciding a
gate area prior to siliciding a source anddrain area
发明人:Jeff Erhardt,Eric Paton申请号:US09733778申请日:20001208公开号:US06387786B1公开日:20020514
专利附图:
摘要:The present invention relates to a method of forming a self-aligned silicide(salicide) by siliciding a gate area prior to siliciding a source and drain area and/or spacer
formation. The method improves transistor speed by lowering the leakage current in thesource and drain areas and lowering the polysilicon sheet resistance of the gate. As aresult of one embodiment of the present method, a silicide is formed over the gate areathat is advantageously thicker than silicide formations over the source and drain areas.
申请人:ADVANCED MICRO DEVICES
代理机构:Skjerven Morrill MacPherson LLP
代理人:Alex C. Chen
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